View 74LVT16374A_319797.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
74LVT16374A 3.3V LVT 16-bit edge-triggered D-type flip-flop (3-State)
Product data Supersedes data of 1999 Oct 18 2002 Nov 01
Philips Semiconductors
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
FEATURES
* 16-bit edge-triggered flip-flop * 3-State buffers * Output capability: +64 mA/-32 mA * TTL input and output switching levels * Input and output interface capability to systems at 5 V supply * Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74LVT16374A is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-State outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels set up at the D inputs.
* Live insertion/extraction permitted * Power-up reset * Power-up 3-State * No bus current loading when output is tied to 5 V bus * Latch-up protection exceeds 500 mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay nCP to nQx Input capacitance Output pin capacitance Total supply current CL = 50 pF; VCC = 3.3 V VI = 0 V or 3.0 V Outputs disabled; VO = 0 V or 3.0 V Outputs disabled; VCC = 3.6 V CONDITIONS Tamb = 25 C TYPICAL 2.9 3 9 70 UNIT ns pF pF A
ORDERING INFORMATION
Type number Package Name 74LVT16374A DL 74LVT16374A DGG 74LVT16374AEV SSOP48 TSSOP48 VFBGA56 Description plastic shrink small outline package; 48 leads; body width 7.5 mm plastic thin shrink small outline package; 48 leads; body width 6.1 mm plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm Temperature Range (C) -40 to +85 -40 to +85 -40 to +85 Version SOT370-1 SOT362-1 SOT702-1
2002 Nov 01
2
853-1781 29140
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
LOGIC SYMBOL (SSOP AND TSSOP PACKAGES)
47 46 44 43 41 40 38 37
PIN CONFIGURATION (SSOP AND TSSOP PACKAGE OPTIONS)
1OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1CP 1D0 1D1 GND 1D2 1D3 VCC 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D2 2D3 VCC 2D4 2D5 GND 2D6 2D7 2CP
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 48 1 1CP 1OE 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
1Q0 !Q1 GND 1Q2 1Q3
2 36
3 35
5 33
6 32
8 30
9 29
11 27
12 26
VCC 1Q4 1Q5 GND
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7 25 24 2CP 2OE 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
1Q6 1Q7 2Q0 2Q1 GND
13
14
16
17
19
20
22
23
2Q2 2Q3
SW00018
LOGIC SYMBOL (IEEE/IEC)
1OE 1CP 2OE 2CP 1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7 30 29 27 26 44 43 41 40 38 37 36 35 33 32 2D 2 1 48 24 25 47 46 1EN C1 2EN C2 1D 1 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
VCC 2Q4 2Q5 GND 2Q6 2Q7 2OE
SW00017
SW00016
2002 Nov 01
3
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
PIN DESCRIPTION (SSOP AND TSSOP PACKAGE OPTIONS)
PIN NUMBER 47, 46, 44, 43, 41, 40, 38, 37 36, 35, 33, 32, 30, 29, 27, 26 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 1, 24 48, 25 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1D0 - 1D7 2D0 - 2D7 1Q0 - 1Q7 2Q0 - 2Q7 1OE, 2OE 1CP, 2CP GND VCC FUNCTION
EV PACKAGE TERMINAL PLACEMENT, TOP VIEW
1 A 2 3 4 5 6
Data inputs
B C
Data outputs
D
Output enable inputs (active-Low) Clock pulse inputs (active rising edge) Ground (0 V) Positive supply voltage
E F G H J K
SR0243
TERMINAL ASSIGNMENTS FOR 74LVT16374A IN VFBGA
1 A B C D E F G H J K 1 OEn 1Q1 1Q3 1Q5 1Q7 2Q0 2Q2 2Q4 2Q6 2OEn 2 NC 1Q0 1Q2 1Q4 1Q6 2Q1 2Q3 2Q5 2Q7 NC GND Vcc GND NC GND Vcc GND NC 3 NC GND Vcc GND 4 NC GND Vcc GND 5 NC 1D0 1D2 1D4 1D6 2D1 2D3 2D5 2D7 NC 6 1CP 1D1 1D3 1D5 1D7 2D0 2D2 2D4 2D6 2CP
NOTE: 1. "n" is used to indicate active low in these tables but use standard method in the data sheets
FUNCTION TABLE
INPUTS nOE L L L H H H= h= L= l= NC= X= Z= = = nCP nDx l h X X nDx INTERNAL REGISTER L H NC NC nDx OUTPUTS OPERATING MODE nQ0 - nQ7 L H NC Z Z Load and read register Hold Disable outputs
High voltage level High voltage level one set-up time prior to the High-to-Low E transition Low voltage level Low voltage level one set-up time prior to the High-to-Low E transition No change Don't care High impedance "off" state Low-to-High clock transition Not a Low-to-High clock transition
2002 Nov 01
4
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
LOGIC DIAGRAM
nD0 nD1 nD2 nD3 nD4 nD5 nD6 nD7
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
nCP
nOE nQ0 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7
SW00019
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current out ut VO < 0 Output in Off or High state Output in Low state Output in High state VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 -64 UNIT V mA V mA V mA
Tstg Storage temperature range -65 to +150 C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%; f 1kHz Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER LIMITS MIN 2.7 0 2.0 0.8 -32 32 64 10 +85 MAX 3.6 5.5 UNIT V V V V mA mA ns/V C
2002 Nov 01
5
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL VIK VOH PARAMETER Input clamp voltage High-level output voltage TEST CONDITIONS VCC = 2.7 V; IIK = -18 mA VCC = 2.7 to 3.6 V; IOH = -100 A VCC = 2.7 V; IOH = -8 mA VCC = 3.0 V; IOH = -32 mA VCC = 2.7 V; IOL = 100 VCC = 2.7 V; IOL = 24 mA VOL Low-level output voltage VCC = 3.0 V; IOL = 16 mA VCC = 3.0 V; IOL = 32 mA VCC = 3.0 V; IOL = 64 mA VRST Power-up output Low voltage5 VCC = 3.6 V; IO = 1 mA; VI = GND or VCC VCC = 3.6 V; VI = VCC or GND II In ut Input leakage current VCC = 0 or 3.6 V; VI = 5.5 V VCC = 3.6 V; VI = VCC VCC = 3.6 V; VI = 0 IOFF IHOLD Output off current Bus Hold current D inputs7 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current Quiescent supply current Additional supply current per input pin2 VCC = 0 V; VI or VO = 0 to 4.5 V VCC = 3 V; VI = 0.8 V VCC = 3 V; VI = 2.0 V VCC = 0 V to 3.6 V; VCC = 3.6 V IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC VO = 5.5 V; VCC = 3.0 V VCC 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6 V; VO = 3.0 V; VI = VIH or VIL VCC = 3.6 V; VO = 0.5 V; VI = VIH or VIL VCC = 3.6 V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6 V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6 V; Outputs Disabled; VI = GND or VCC, IO = 06 VCC = 3 V to 3.6 V; One input at VCC-0.6 V, Other inputs at VCC or GND 75 -75 500 50 1 0.5 0.5 0.07 4 0.07 0.1 125 100 5 -5 0.12 6 0.12 0.2 mA mA A A A Data pins4 ins Control pins VCC-0.2 2.4 2.0 Temp = -40 C to +85 C MIN TYP1 -.85 VCC 2.5 2.3 0.07 0.3 0.25 0.3 0.4 0.1 0.1 0.4 0.1 -0.4 0.1 135 -135 A 0.2 0.5 0.4 0.5 0.55 0.55 1 10 1 -5 100 A A V V V MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3 V and Tamb = 25 C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10msec. From VCC = 1.2 V to VCC = 3.3 V 0.3 V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25 C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state.
2002 Nov 01
6
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
AC CHARACTERISTICS
GND = 0 V; tR = tF = 2.5 ns; CL = 50 pF; RL = 500 ; Tamb = -40 C to +85 C. LIMITS SYMBOL fmax tPLH tPHL tPZH tPZL tPHZ tPLZ PARAMETER Maximum clock frequency Propagation delay nCP to nQx Output enable time to High and Low level Output disable time from High and Low Level WAVEFORM 1 1 3 4 3 4 VCC = 3.3 V 0.3 V MIN 150 1.5 1.5 1.5 1.5 1.5 1.5 2.9 3.0 3.2 3.0 3.9 3.4 5.0 5.0 4.8 4.6 5.4 4.6 5.6 5.6 6.0 5.2 6.0 5.0 TYP1 MAX VCC = 2.7 V MAX MHz ns ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3 V and Tamb = 25 C.
AC SETUP REQUIREMENTS
GND = 0 V; tR = tF = 2.5 ns; CL = 50 pF; RL = 500; Tamb = -40 C to +85 C. LIMITS SYMBOL tS(H) tS(L) th(H) th(L) tW(H) tw(L) Setup time nDx to nCP Hold time nDx to nCP nCP pulse width High or Low PARAMETER WAVEFORM VCC = 3.3 V 0.3 V MIN 2 2 1 2.5 2.5 0.5 0.5 1.5 3.0 TYP 0.7 0.7 0 0 0.6 1.6 VCC = 2.7 V MIN 2.5 2.5 0 0 1.5 3.0 ns ns ns UNIT
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 3.0 V
1/fMAX 2.7V 2.7 V
nCP
VM tw(H) tPHL
VM tW(L)
VM 0V
nOE
VM tPZH
VM 0V tPHZ VOH VOH -0.3 V 0V
tPLH VOH
nQx
nQx
VM
VM VOL
VM
SW00020
SW00014
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
2.7V
Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level
2.7 V
nDx
nCP
2002 Nov 01
EEE E EEEEEEEEE EEE EEEEEEE EEE
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
0V
nOE
VM tPZL
VM 0V tPLZ 3V
2.7V
0V
nQx
VM
VOL +0.3 V VOL
SW00021
SW00015
Waveform 2. Data Setup and Hold Times
Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
7
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
TEST CIRCUIT AND WAVEFORMS
6V VCC OPEN RL GND 90% NEGATIVE PULSE VM 10% tTHL (tF) CL RL POSITIVE PULSE 10% tW tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
VIN PULSE GENERATOR RT D.U.T.
VOUT
Test Circuit for 3-State Outputs
VM
SWITCH POSITION
TEST tPHZ/tPZH tPLZ/tPZL tPLH/tPHL SWITCH GND 6V open
VM = 1.5 V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT16 2.7 V Rep. Rate 10 MHz tW tR tF
500 ns 2.5 ns 2.5 ns
SW00003
2002 Nov 01
8
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
2002 Nov 01
9
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
2002 Nov 01
10
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm
SOT702-1
2002 Nov 01
11
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
REVISION HISTORY
Rev _4 Date 20021101 Description Product data (9397 750 10649); supersedes Product specification 74LVT16374A_3 of 1999 Oct 18 (9397 750 06514) Engineering Change Notice 853-1781 29140 (date: 20021101) Modifications:
* Added VFBGA package option
2002 Nov 01
12
Philips Semiconductors
Product data
3.3V 16-bit edge-triggered D-type flip-flop (3-State)
74LVT16374A
Data sheet status
Level
I
Data sheet status [1]
Objective data
Product status [2] [3]
Development
Definitions
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data
Qualification
III
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 11-02
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 10649
Philips Semiconductors
2002 Nov 01 13

▲Up To Search▲

Price & Availability of 74LVT16374A

	To Download 74LVT16374A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .